EE Projects

High-speed digital design, signal integrity, power integrity, and electrical engineering projects.

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Clock Distribution Network (H-Tree) in ADS

High-Speed Digital

Designed and analyzed a hierarchical H-tree clock distribution network for synchronous digital systems using Advanced Design System (ADS). The design addresses clock skew minimization, power distribution optimization, and signal integrity across large-scale integrated circuits. Implemented balanced routing topologies to ensure uniform clock arrival times at all synchronous elements while maintaining low power consumption and minimal jitter across process variations.

  • Designed hierarchical H-tree topology for balanced clock distribution
  • Analyzed clock skew and jitter across process corners
  • Optimized power distribution network for clock tree
  • Evaluated signal integrity and timing closure requirements
  • Characterized performance under PVT variations
  • Validated design through SPICE-level simulations
Clock Distribution Signal Integrity IC Design Timing Analysis ADS
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High-Speed PCB Signal & Power Integrity (500 MHz PRBS)

High-Speed Digital

Conducted comprehensive signal integrity (SI) and power integrity (PI) analysis for a high-speed printed circuit board operating at 500 MHz with pseudorandom binary sequence (PRBS) signaling. The analysis covered transmission line design, impedance matching, power delivery network optimization, and electromagnetic compatibility. Designed controlled-impedance traces, optimized power plane layouts, and validated performance through frequency-domain and time-domain simulations to ensure reliable operation at target speeds.

  • Designed controlled-impedance transmission lines for 500 MHz operation
  • Optimized power delivery network (PDN) for low impedance across frequency
  • Analyzed signal integrity metrics including eye diagrams and jitter
  • Evaluated power integrity through impedance analysis and voltage drop calculations
  • Performed electromagnetic compatibility (EMC) analysis and mitigation
  • Validated design through S-parameter and transient simulations
PCB Design Signal Integrity Power Integrity EMC Analysis PRBS
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Analog Tone-Control & Karaoke Audio System

Analog / Audio

5-Stage Op-Amp Signal Processing Chain (Mixer, Baxandall EQ, LED Meter, Output Driver). Designed and built a 5-stage analog audio processing system capable of operating as both a stereo mixer and karaoke vocal canceller. The first stage uses a switchable inverting summing and subtracting amplifier to produce either (L + R) mixing mode or (L āˆ’ R) karaoke mode for vocal suppression. The second stage implements an active Baxandall tone control circuit providing adjustable bass and treble gain using RC filtering and potentiometers. The third stage provides volume control via a variable voltage divider, and the fourth stage drives a multi-level LED volume indicator using comparator-based threshold detection. The final stage is an inverting output driver with gain scaling to safely attenuate the signal for headphone output. The system was simulated in Multisim, validated on breadboard, and fabricated onto a custom PCB powered by a 9V supply.

  • Switchable inverting summing/subtracting stage for (L+R) mix or (Lāˆ’R) karaoke vocal cancellation
  • Active Baxandall tone control with adjustable bass and treble via RC filtering and potentiometers
  • Comparator-based multi-level LED volume indicator with threshold detection
  • Inverting output driver with gain scaling for safe headphone output
  • Simulated in Multisim, breadboard-validated, and fabricated on custom PCB with 9V supply
Analog Circuit Design Op-Amps (LF412) Baxandall Tone Control Active Filters Comparator LED Ladder PCB Design Multisim Simulation